Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Click to edit master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,Page,*,Confidential,Package process introduction,Presenter:GanJun Luo,2019/08/15,Package process introductionPr,Purpose and Outline,Purpose:,Share package process introduction,Out line:,The purpose of chip packaging,Process flow,Page,2,Purpose and OutlinePurpose:Pag,The purpose of chip packaging,Page,3,The purpose of chip packaging:,The IC dies on the wafer are,separated,for die attach,connect external pins by wire bonding,then do molding to,protect electronic packaging devices from environmental pollution(moisture,temperature,pollutants,etc.);,protect the chip from mechanical impact;provide structural support;provide electrical insulation support.It is easily connected to the PCB board.,The purpose of chip packagingP,Process flow,Page,4,Wafer Saw,Die Attach,Wafer Mount,Wafer Grinding,Epoxy Cure,Pre-Molding plasma,P,ost,M,old,C,ure,Plating,Trim/Form,Test,De-junk,Laser Marking,Before,After,Laser Marking,Laser Marking,Pre-WB plasma,Wire Bond,FOL(Front of Line),EOL(End of Line),Molding,De-flash,Packing,Process flowPage 4Wafer SawDie,Page,5,Wafer Grinding,Purpose:,Make the wafer to suitable thickness for the package,Machine,Disco(DFG8540),Material,UV Tape,Control,DI Wafer Resistivity,Vacuum Pressure,Check,Wafer Roughness,Wafer Warpage,Wafer Thickness,Visual Inspection,Page 5Wafer GrindingPurpose:Ma,Page,6,Wafer Mount,Purpose:,Combine the wafer with D,icing,tape,onto the frame,for,die,sawing,Page 6Wafer MountPurpose:,Page,7,Wafer Saw,Purpose:,Make the wafer to unit can pick up by die bonder,Machine,Disco(DFD4360/DAD3350),Material,Saw Blade,Control,DI Water Resistivity(+CO2),Sawing/Cleaning Parameter,Check,Kerf Chipping Width,Visual Inspection,Page 7Wafer SawPurpose:Machine,Page,8,Wafer Saw,Wafer Saw Technology,Technology,Advantages or Characteristics,Range of application,BD(Blade Dicing),使用微细金刚石颗粒构成的磨轮刀片，以每分钟,3,万转到,4,万转的高转速切割晶圆，同时,承载着晶圆的工作台以一定的速度沿刀片与晶圆接触点的切线方向呈直线运动,切割晶圆产生的硅屑被去离子水,(Dl water),冲走。,切割速度慢，生产效率低，随着晶片的厚度越薄，切割的难度也就越大，背面崩裂现象就会有加重的趋势。,一般硅晶片,Laser full cutting,将激光能量于极短的时间内集中在微小区域，使固体升华、蒸发的全切割加工,切割速度快，生产效率高，对于薄片可以有效减少背面崩裂现象，切割槽宽度小，与刀片相比切割槽损失少，所以可以减小芯片间的间隔,Thin wafer,；背面附金属膜的硅晶片如：,GaP(,磷化镓,),晶片等,Laser Groove+BD,先在切割道内切开用激光,2,条细槽,(,开槽,),，然后再使用磨轮刀片在,2,条细槽的中间区域实施全切割,采用了非发热加工方式即短脉冲激光切割技术，来去除切割道上的,Low-k,膜及铜等金属布线，所以能够在开槽加工过程中最大限度地排除因发热所产生的影响，能够提高生产效率，减少崩裂、分层,(,薄膜剥离,),等不良因素造成的加工质量问题。,Low-k wafer,SD(Stealth Dicing),隐形切割是将激光聚光于工件内部，在工件内部形成改质层，通过扩展胶膜等方法将工件分割成芯片的切割方法,由于工件内部改质，因此可以抑制加工屑的产生。适用于抗污垢性能差的工件；适用于抗负荷能力差的工件（,MEMS,等），且采用干式加工工艺，无需清洗；可以减小切割道,宽度，,因此有助于减小芯片间隔,Ultra-thin wafer(Flash Memory,Memory Controller),Process difference between BD and SD:SDBG:,Refer to http:/www.disco.co.jp/cn_s,Page 8Wafer SawWafer Saw Tech,Page,9,Wafer Saw,Quality Control,切偏,正崩,划片宽度量测,Page 9Wafer SawQuality Control,Page,10,Die Attach,Purpose:,Pick up the die and attach it on the lead frame by epoxy,Pick up tool:247X479mil,Machine,ESEC/ASM,Material,Epoxy/Leadframe,Control,Bonding Parameter,Collect/Needle Height,Check,Epoxy Thickness/Die Tilt,Bonding Position/Die Shear,Visual Inspection,Collect,Needle,Page 10Die AttachPurpose:Pick,Page,11,Die Attach,Die attach,method,Eutectic,Epoxy,soft solder,DAF,装片工艺,粘结方式,技术要点,技术优缺点,共晶（,Eutectic,）,金属共晶化合物；扩散,芯片背面镀金，镀银基岛，轨道气保护加热,导热电性能好，但,CTE,失配严重，在焊接中易产生热应力，芯片易开裂，一般只用于小芯片装片,导电胶（,Epoxy,）,环氧树脂（填充银）化学结合,芯片不需要预处理，粘结后固化出来或热压结合,工艺通用性强，适用于导电热性要求不高的器件，因为其导热电性能比共晶、铅锡银装片差，吸潮易形成空洞，开裂。,软焊料（,Soft Solder),铅锡银焊料合金反应,芯片背面镀银或金或镍，镀银基岛更优，轨道气保护加热,导热电性能好，但工艺复杂，焊料易氧化，一般用于大电流大功率器件,玻璃胶（,DAF,）,绝缘玻璃胶物理结合,上胶加热至玻璃熔融温度,成本低，适用于超薄芯片叠封，焊线前需要洗,plasma,去除有机成分,Page 11Die AttachDie attach m,Page,12,Die Attach,粘着剂